FARSI: An Early-stage Design Space Exploration Framework to Tame the Domain-specific System-on-chip Complexity
نویسندگان
چکیده
Domain-specific SoCs (DSSoCs) are an attractive solution for domains with extremely stringent power, performance, and area constraints. However, DSSoCs suffer from two fundamental complexities. On the one hand, their many specialized hardware blocks result in complex systems thus high development effort. other system knobs expand complexity of design space, making search optimal difficult. Thus to reach prevalence, taming such complexities is necessary. To address these challenges, this work, we identify necessary features early-stage space exploration framework that targets provide instance refer as FARSI. FARSI provides agile system-level simulator speed up accuracy 8,400× 98.5% compared Synopsys Platform Architect. also efficient heuristic achieves 62× 35× improvement convergence time classic simulated annealing (SA) modern Multi-Objective Optimistic Search. This done by augmenting SA architectural reasoning locality exploitation bottleneck relaxation. Furthermore, embed various co-design capabilities show that, on average, they have a 32% impact rate. Finally, demonstrate using development-cost-aware policies can lower complexity, both terms component count variation much 60% 82% (e.g., Network-on-a-Chip subsystem), respectively.
منابع مشابه
Design space exploration in Multi-Processor System-on-Chip platforms
This paper gives an insight into heterogeneous multi-processor embedded systems design process and key issues related to achieving time and cost efficient improvements. After giving an overview of existing design methodologies linked to various levels of abstraction at which design process can be viewed, system modelling process is discussed in a more detailed manner. Special accent is put on m...
متن کاملTowards a Design Space Exploration Methodology for System-on-Chip
This paper provides an overview of a design space exploration methodology for customizing or tuning a candidate OCI architecture, given a resources budget and independent of a particular application traffic pattern. Three main approaches are introduced. The first approach allows customizing the OnChip Interconnect by adding strategic long-rang links, while the second consists in customizing the...
متن کاملLow Complexity Design Space Exploration from Early Specifications
Performance evaluation and design space exploration from early specifications is still a time consuming, experience and technology dependant issue in the design process. However, evaluation of architectural alternatives at an early stage of the design process is important because the choices made have a critical impact on the system final characteristics (area, performances, power consumption, ...
متن کاملMulticube Explorer: An Open Source Framework for Design Space Exploration of Chip Multi-Processors
Given the increasing complexity of Chip Multi-Processors (CMPs), a wide range of architecture parameters must be explored at design time to find the best trade-off in terms of multiple competing objectives (such as energy, delay, bandwidth, area, etc.) The design space of the target architecture is huge because of it should consider all possible combinations of each parameter (number of process...
متن کاملDesign Space Exploration of Mesh Based Network-on-Chip Architectures
Design space exploration and performance evaluation are the most essential task in NoC design. In this paper, we proposed a design space exploration framework using analytical modeling. We have considered many-many mapping between cores and switches. A buffer allocation algorithm for wormhole routing based networks-on-chip is proposed for the design space exploration. When the total budget of t...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: ACM Transactions in Embedded Computing Systems
سال: 2023
ISSN: ['1539-9087', '1558-3465']
DOI: https://doi.org/10.1145/3544016